1. Field of the Invention
The invention relates to a television receiver including a tuning circuit which comprises a frequency synthesis circuit in which the tuning of a tuning oscillator is obtained by means of a frequency divider which is adjustable by means of a tuning datum, said tuning datum being corrigible by means of a frequency detection circuit when receiving a television signal identified as being correct by an identification circuit, said frequency detection circuit being coupled to an output of an intermediate frequency amplifier, an input of which is coupled to an output of the tuning circuit.
2. Description of Related Art
A television receiver of this type, using a frequency discriminator as a frequency detection circuit, is known from U.S. Pat. No. 4,025,953. The output voltage of this frequency discriminator is coverted into digital signals by means of threshold circuits, with which signals the tuning datum is adjustable. This tuning datum adjusts the frequency divider which is incorported in a reference signal path of the frequency synthesis circuit.
In modern television receivers, a maximum possible number of integrated circuits is used, trying to incorporate the largest possible part of the tuning circuit in a first integrated circuit and the largest possible part of intermediate frequency and detection circuits in a second integrated circuit. It must then be ensured that these integrated circuits have a minimum number of terminals.